Xgig 6P16 Analyzer/Exerciser for PCI Express 6.0

Présentation
Ressources

The VIAVI Solutions Xgig® 16-Lane Exerciser for PCI Express® 6.0 brings the next generation of high-speed 64GT/s test capability to the Xgig PCIe product portfolio. The Exerciser is a valuable tool for debugging difficult protocol communication problems because it provides full, bit-level, repeatable control for generated PCIe 6.0, CXL and NVMe data traffic. The Analyzer allows detailed view of traffic between a host and endpoint device, supporting PCIe FLIT Mode, Non-Flit Mode, CXL, and NVMe. Exerciser and Analyzer functionality is provided via a multi-function chassis and application-specific Analyzer or Exerciser Interposers.

Benefits

Fully integrated Analyzer/Exerciser enables a variety of test conditions
Enables capture and decoding of the most complex PCIe, CXL and NVMe test cases
Maximum flexibility in analyzing and debugging protocol issues
Powerful graphical control interface provides quick status information and rapid test case set-up
Optimizes signal integrity at PCIe6
Quicker time to market and earlier revenue
Lower engineering costs

Applications

Analyzer allows detailed view of traffic between a host and endpoint device, supporting PCIe FLIT Mode, Non-Flit Mode, CXL and NVMe specifications
Allows capture and analysis of traffic flows between the Exerciser and its link partner
Exerciser emulates the operation of a Root Complex (RC) or an Endpoint (EP) device
Enables bandwidth intensive applications like High-Performance Computing and Artificial Intelligence needed by hyperscalers and other providers

Highlights

Operates up to 64GT/s PAM4, PCIe 6.0 data rates
Downward compatible with PCIe 1.0, 2.0, 3.0, 4.0 and 5.0, and data rates of 2.5, 5.0, 8.0, 16 and 32GT/s NRZ
Supports link widths of 1, 2, 4, 8 and 16-lanes
64GB total memory (32GB upstream capture and 32GB downstream capture)
User can set Exerciser link rates and widths and control transitions to other rates
Fully integrated Analyzer/Exerciser enables a variety of test conditions
Support for new PCIe FLIT Mode, FEC and TS0 Ordered Set
LTSSM state tracker with history log
User can define and save custom test configurations
Scripting API allows creation of complex, user-defined test cases
Supported by VIAVI Xgig tool suite including Trace Control, Expert and Serialytics