Xgig MCIO 16-lane Interposer for PCI Express 6.0
Provides a tap of MCIO/CopprLink™ PCIe signals for input to the VIAVI PCIe 6.0 Analyzer
Enables debug and validation with MCIO interfaces, MCIO peripherals, host system implementations, firmware and drivers, validation of system BIOS and software, error injection, and for manufacturing test.
MCIO/CopprLink is becoming popular in AI servers, storage systems, and hyperscale data center environments because it enables high speeds in a compact form factor.
Working together with the VIAVI PCIe® 6.0 Analyzer/Exerciser platform, the Interposer enables debug and validation with MCIO interfaces, MCIO peripherals, host system implementations, firmware and drivers, validation of system BIOS and software, error injection, and for manufacturing test. It supports full decode and analysis of PCIe data traffic and link states.
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