Xgig 6P4 Exerciser for PCI Express 6.0

Xgig 4-Lane Exerciser for PCI Express 6.0

4-lane PCIe6 Exerciser solution with support for CXL and NVMe

Xgig 6P16 Analyzer/Exerciser for PCI Express 6.0
Xgig 6P16 Analyzer/Exerciser for PCI Express 6.0

The VIAVI Solutions Xgig® 4-Lane Exerciser for PCI Express® 6.0 is a valuable tool for debugging difficult protocol communication problems.  This 6P4 Exerciser can be configured to emulate the operation of a Root Complex (RC) or an Endpoint (EP) device, effectively acting as a highly-configurable link partner for testing Hosts and Endpoint devices.  The 6P4 has built-in analysis capabilities and is enabled automatically to capture full duplex data between the Exerciser and its link partner.  This is a fully integrated solution with Exerciser functionality provided in a single CEM card form factor.

Benefits

  • Enables capture and decoding of the most complex PCIe, CXL and NVMe test cases
  • Maximum flexibility in analyzing and debugging protocol issues
  • Powerful graphical control interface provides quick status information and rapid test case set-up
  • Optimizes signal integrity at PCIe6
  • Quicker time to market and earlier revenue
  • Lower engineering costs

Applications

  • Allows capture and analysis of traffic flows between the Exerciser and its link partner
  • Emulates the operation of a Root Complex (RC) or an Endpoint (EP) device
  • Supports CXL and NVMe specifications
  • Enables bandwidth intensive applications like High-Performance Computing and Artificial Intelligence needed by hyperscalers and other providers

Highlights

  • Operates up to 64GT/s PAM4, PCIe 6.0 data rates 
  • Downward compatible with PCIe 1.0, 2.0, 3.0, 4.0 and 5.0, and data rates of 2.5, 5.0, 8.0, 16 and 32GT/s NRZ 
  • Supports link widths of 1, 2, and 4-lanes 
  • 32GB total memory (16GB upstream capture and 16GB downstream capture)
  • User can set link rates and widths and control transitions to other rates
  • Fully integrated Analyzer function enables a variety of test conditions
  • Support for new PCIe FLIT Mode, FEC and TS0 Ordered Set
  • LTSSM state tracker with history log
  • User-configurable custom test configurations for positive and negative test cases
  • Scripting API allows creation of complex, user-defined test cases
  • Supported by VIAVI Xgig tool suite including Trace Control, Expert and Serialytics
     

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